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 Neuron Chips and NeuronŽ C for Embedded Control Network

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PostSubject: Neuron Chips and NeuronŽ C for Embedded Control Network   Tue Jul 24, 2007 4:18 pm

Neuron Chip

The Neuron Chip is a system-on-a-chip with multiple processors, read-write and read-only memory (RAM and ROM), and communication and I/O subsystems. The read-only memory contains an operating system, the LonWorks protocol, and an I/O function library. The chip has non-volatile memory for configuration data and for the application program, both of which are downloaded over the LonWorks network. At the time of manufacture, each Neuron Chip is given a permanent unique-in-all-the-world 48-bit code, called the Neuron ID. A large family of Neuron Chips is available with differing speeds, memory type and capacity, and interfaces. Approximately 54 million Neuron Chips had been shipped as of mid 2004.

A complete operating system including an implementation of the LonWorks protocol, called Neuron Chip Firmware, is contained in ROM on, or attached to, every Neuron Chip. Most LonWorks devices include a Neuron Chip, which has an identical, embedded implementation of the LonWorks protocol. This approach eliminates the "99% compatibility" problem and assures that connecting LonWorks devices together on the same network requires little or no additional hardware. The Neuron Chip is actually three, 8-bit inline processors in one. Two execute the LonWorks protocol; the third is for the device's application. The chip is, therefore, both a network communications processor and an application processor, significantly reducing the implementation cost for most LonWorks devices.

Neuron C Programming

Neuron C lets you create LonWorks applications for Neuron Chips and Smart Transceivers. With its extensions for network communication, hardware I/O, and event-handling, and its familiar ANSI C-based programming environment, the Neuron C language offers power and ease.
Features

* Based on ANSI C for a familiar programming environment
* Provides a network communication model based on functional blocks and network variables to simplify and promote data sharing between like or disparate devices
* Provides a network configuration based on functional blocks and configuration properties to facilitate interoperable network configuration tools
* Includes a feature-rich type model based on standard and user resource files that expands the market for interoperable devices
* Includes an extensive built-in set of I/O objects supporting the powerful I/O capabilities of Neuron Chips and Smart Transceivers
* Provides powerful event-driven programming extensions for easy handling of network, I/O, and timer events
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